Solder Interconnect Design Team
Develop and evaluate computational methods and software tools for modeling geometries in solder interconnects to improve industrial electronic packaging processes.
Inspection and repair of solder defects in electrical and optical interconnects is expensive and labor intensive. As circuits become smaller, the importance of computational tools in integrating design and performance with manufacturability and reliability increases. The electronics industry must optimize solder interconnects, but lacks tools to predict performance and reliability of the wide range of geometries used.
Easy to use, public domain software tools that facilitate solder interconnect design.
Faster, cheaper design and development of electronic packages.
Computer manufacturers, consumer electronics, and automotive industries.
Accomplishments and Highlights
- Tools developed by group have improved industrial electronic packaging processes at Motorola and DEC.
- Two CTCMS workshops identified participants and chose industrially important geometries.
- Software extended to include 3D geometries.
- Development of a user friendly graphical user interface underway.
- AT and T hired a summer student to collaborate with CTCMS.
Nist Researchers:J.A. Warren, C. Handwerker, D. Josell, W. Boettinger (MSEL)
Collaborators:K. Brakke (Susq. U), C. Bailey (Greewich U), D. Whalley (U. LB)
Industry:Motorola, DEC, Ford, Lucent, BOC Gases, AMP, Rockwell
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